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Wohnort                    81xxx, Deutschland 
EDV-Erfahrung seit         1984 
Verfügbar ab               01.07.12 zu 100%, Vor-Ort-Einsatz 100% möglich 
Software Entwicklung im bereich Telekommunikation, Echtzeit Betreibsysteme, Embedded Software, Hardware Entwicklung
Software-Entwicklung / Programmierung
Beratung / Consulting
Hardware-Entwicklung
Engineering / IT-nahe Ingenieurdienstleistungen
Festanstellung kommt derzeit nicht in Betracht, nur freiberufliche Mitarbeit
B. Eng (Honours) in Electronic Engineering von Uni Limerick, Ireland. (1984)
Deutschland: D8, D9
Österreich
Schweiz
Kommentar:

Deutschland: - bevorzugt Bereich D8

DeutschFließend
EnglischMutter Sprache
FranzösischImmer noch am learnen
Irisch-GälischGrundkenntnisse

Ascii/X - Terminals 
DigitalVMS on VAX 750/780 - DEC Professional - Micro Vax
Digitale Signalprozessoren 
Drucker 
EchtzeitsystemeVrtx, Necleus Plus
embedded Systeme 
EmulatorenIn-Circuit Emulators - Hitex, Microtek, Tektronix,
Hardware entwickelti80486 Basiert Kontroller, SCSI Controller, i80188 Protokol Converter
Messgeräte 
Mikrocontroller 
Motorola6800, 68000, 68008 ... (Assembler)
NEC 
Nixdorf 
PCDetailkenntnisse
Philips 
PLD, FPGA 
Proprietäre HW 
SUNSparc
Texas InstrumentsVerscheiden Chipsets

SNI RM-Rechner: SNI RM 600, RM200
Intel uP: 8085, 8051, i80486, i80586, Pentium, i80C188, i80960, 80C152,
Infinion/Siemens uP: 80C16x, Tricore, Carmel DSP,
Zilog uP: Z80
Logic Analyisers (Tektronix, HP, ...)
Oszilloskop
PCI Bus
Multibus
CAN Bus
Mikrocontroller
CP/MAus Fruhere Zeiten
EchtzeitbetriebssystemeExpert
MS-DOS 
pSOS 
RTOS (Real Time OS) 
SUN OS, Solaris 
Unix 
VxWorks 
Windows 

Linux
Sinix
VRTX
Necleus Plus

ASN.1 
Assembler80x86 protected Mode, Frequent Hacker, PowerPC,
Basic 
C 
C++ 
Emacs 
Imake, GNU-Make, Make-Maker etc... 
Pascal 
SDLObjectGeode, Tau
Shell 
TeX, LaTeX 

HTML (Web Page Generation)
XML
Javascript
Shell
PERL
SED
Borland C++
C++ Builder 5.0
Mentor
VHDL
PurifyPlus
UML

MySQL

BusMultibus, PCI, SCSI
Ethernet 
HDLC 
ISDNSS7
ISO/OSI 
NetBios 
parallele Schnittstelle 
Proprietäre Protokolle 
RS232 
TCP/IP 
Token Ring 
Winsock 
X.400 X.25 X.225 X.75... 

UMTS

Viel Erfahrung mit Hierarchial State Machine Software

UMTS - Access Stratum - L1, MAC,RLC,RRC, Radio Bearers, Iu/Uu Interface
Long Term Evolution (LTE)
SubVersion (SVN)
ClearCase
Jenkens
3GPP
WinCVS
SMS (Siemens intern - CVS)
MS Office 2000 Professional
Lexware
Telelogic Tau
Partition Magic
PurifyPlus
Altera Maxplus II (FPGA Design)
MS Project
Quicken
Works
Adobe Premiere 4.0 (Audio- und Videover-arbeitung)
Editoren: vi, Brief, Emacs, Nedit, ...
Projektleitung
Projektterminierung
Personaleinsatzplanung
Analysen
Fachkonzepte
Programmdesign
Funktionsmodellierung
Realisierung, Implementierung und Test
Qualitätssicherung
Reengineering
Dokumentation
Geschult nach DIN EN ISO 9001
Hardwareherstellung: Embedded Devices
Mobilfunk
Telekommunikation
Autobranche
Forschung und Entwicklung
Luft- und Raumfahrt

Time:       06/2008 – 01/2012
Customer:   ***** ******* *******, Ulm
Project:    Development of Control Plane Software for LTE eNodeB

Responsibilities:    
  • Design and implementation of LTE S1-handover procedures to WCDMA and Network Assisted Cell Change to GSM supporting data forwarding and reestablish scenarios

     

  • Design and implementation of resource allocation algorithms for Channel Quality and Rank Indicator signaling, Paging, System Information Update and Sounding Reference Symbols control for both Time Division Duplex and Frequency Division Duplex operation modes

     

  • Implementation of extensive TTCN3 test cases for verification of eNB behavior for UE Reestablishment during Inter-RAT handover. Integration of these test cases into the existing regression test suite

     

  • Implementation of Unit Tests using Google Mocks and CPP-Unit as part of each feature implementation.

     

  • Integration of Encryption and Data Integrity Software components for LTE eNB including algorithm verification using 3GPP published test patterns

     

  • Test Environment extension permitting Subsystem Unit-Test execution in a Continuous Integration Environment

     

  • Introduction of Hierarchical State Machine support to enhance event handling in LTE subsystems

     

  • System Test Environment extension to support Valgrind as well as DDD and permit Performance Analysis or Interactive debugging during TTCN3 test case execution

     

  • Initial Integration software updates on target system following feature completion

     

  • Analysis and correction of test environment instabilities

     

  • Analysis of error reports (i.e. from field tests) and re-creation of failure scenarios using in-house tools and followed preparation of fixes and delta patches

 

Technologies:    Linux, Windows; C++, GNU tool chain, Bash, Perl, Subversion (SVN), Valgrind, DDD, Google Mocks, CPP Unit, ASN.1, Jenkins, Eclipse, Doors, TWiki



 



Time:       01/2008 – 06/2008
Customer:   ******* **, Ulm
Project:    Software for UMTS infrastructure – Performance Optimization on NodeB


Responsibilities:    
  • Optimization of NodeB performance in the area of measurement handling and call setup

     

  • Preparation of “Golden” performance test case to emulate classic high load scenarios measured in the field

     

  • Initial verification of the improved subsystem using Callgrind, Valgrind

     

  • Target system testing to analyze CPU usage under load conditions

     

  • Replacing ACE library based container classes with alternative STL Hash Maps to improve performance (20% performance improvement)

     

  • Introduction and implementation of special performance monitoring test cases into the regression test suite to detect software changes leading to a performance reduction in critical areas

 

Technologies:    Embedded Linux, Windows; C++, GNU tool chain, Bash, Perl, Callgrind, DDD, ASN.1, Eclipse, Emacs, SED, SDL, Assembler, Clearcase, TWiki




Time:       02/2003 – 01/2008
Customer:   ******* **, Ulm
Project:    Software for UMTS infrastructure – NodeB Development


Responsibilities:    
  • Responsible for implementation and initial integration of resource setup, release, modification related to common channels (CELL configuration, PRACH, SCCPCH, HSDPA and HSUPA) including support for re-establish and rollback of resources on baseband cards following hot insert, removal or reset

     

  • Implemented parsing and validation of ASN.1 encoded System Information Update messages received from the Radio Network Controller followed by message translation to CORBA/IDL before forwarding to CORBA-Servant with Fault Tolerance as basic requirement

     

  • Implementation of a Control Centre Module to resolve and prioritize conflicting events received either from different sources such as the Radio Network Controller and the O&M entity (serialization, restart or discard of events)

     

  • Code-redesign and replacement of complete SDL based state machines with a solution using C++ based Hierarchical State Machine pattern

     

  • Implementation of a Hierarchical State Machine based test call handler to permit load condition simulation on the target system (NodeB) in order to aid customers in network evaluation and field testing phase

     

  • System integration and testing of system software on target (NodeB). Validation of features such as fault tolerance enhancements in which common channel resources are migrated to neighboring baseband hardware avoiding call drops etc. even following a radio head or baseband card reset or removal

 

Technologies:    Linux, Windows; C++, GNU tool chain, Bash, Perl, Valgrind, DDD, Google Mocks, CPP Unit, ASN.1, Eclipse, Doors, Emacs, SED, SDL, Assembler, DocoWiki




 


Time:       08/2002 – 02/2003
Customer:   ******* **, Ulm
Project:    Software for UMTS infrastructure – Next Generation NodeB


Responsibilities:    
  • Requirement analysis for architectural redesign of baseband boards as part of higher performance NodeB including analysis of hardware / software impact

     

  • Definition of requirements; design documentation, specifications; handling of internal & external change requests

     

  • Evaluation and break down of features into work packages for implementation

 

Technologies:    LINUX and Windows XP based host environment;
UML,GNU tool chain, ClearCase, MS-Office, MS-Project





Time:       12/1999 – 06/2002
Customer:   ****** **, Munich
Project:    UMTS Access Stratum SW development and testing for UE protocol stack


Responsibilities:    
  • Evaluation of 3rd party tools for protocol stack development and testing

     

  • Member of Architecture Team defining UE protocol Stack structure including test tool environment and interface definition

     

  • Specification and implementation of a TCP/IP based multi host in-house test environment which in addition to simulating higher layer network behavior also accurately simulated the packet behavior on the air interface/physical layer

     

  • Extension of in-house MSC driven test tool allowing the user to modify the default message content, verify and re-transmit messages without requiring any re-compilation

     

  • Specification of an ASN.1 message editing tool to permit a user to construct or verify content for ASN.1 messages for testing purposes via a graphical interface

     

  • Requirement definition for RLC layer implementation within our UE protocol stack

     

  • Project leader for UE side’s Medium Access Control (MAC) entity
    • leading participation in SDL and C++ based implementation
    • test case definition and test planning with in-house test tool as well as an external Anite®’s  UMTS test system

       

  • Porting of UE protocol stack to hardware platform based on ARM7TDMI targets running NucleusPlus real time OS

 


Technologies:    Windows; Perl, Objective Systems ASN.1, Emacs, Object Geode SDL, x86 Assembler, ARM7TDMI, MAC, RRC, RLC, 3GPP, MS-Visual C++, Nucleus Plus,  TCP/IP, Lauterbach Tools, CVS, DokoWiki




Time:       1991 – 1999
Customer:   *** Neuperlach, Munich
Project:    Development of Hardware and Software for Mid-range Servers


Responsibilities:    
  • Member of team developing X21 protocol stack executing on i80486 Multibus-II and PCI based controller cards allowing multidrop X21-End-Points each of which allows connection of up to sixteen X21 terminals etc.

     

  • Preparation and setup of test environment consisting of rack containing over 30 X21 terminals for protocol integrity verification even when a terminal is disconnected without first deactivating the associated logical channels

     

  • Development of Built-In-System Test environment for CCA controller to test FPGA which replaced i82370 peripheral controller

     

  • Hardware development of ISDN primary rate Multibus-II controller card. Boot-up firmware and device driver support for SS#7 communications protocol

     

  • Hardware redesign of older Multibus-II protocol controller due to intermittent memory problems detected during field testing including SPICE simulations to identify possible problem points

     

  • System integration and test of prototype hardware including trainings held for hardware production team

     

  • CAN BUS protocol development for 80C167CR Master Controller Card allowing control of CAN BUS slaves which support generic command set. Construction of TCP/IP connection to/from Central Services Module permitted remote login on CAN BUS slaves

     

  • Development of Virtual Test Environment for file server containing an array of intel MERCED® CPUs plus various other controller cards where each test target component should support a basic set of test commands plus a controller specific extended test list

     

  • Development of embedded trace procedures utilizing the i80x86 extended hardware debug registers in order permit a user to insert watch points during test execution

     

  • Development of a Master/Slave interaction test environment for SNI-SPBus which in addition to local test suites also uploaded test suites to Slave controllers in order to verify read/write access via SPBus across all subsystems.  Thus test patterns written by a controller to shared SPBus memory/peripherals would be verified by the master test controller

 

Technologies:    HDLC, VRTX RTOS, X21, i80486, PCI, Multibus-II, Tectronics ICE, Mentor Graphics, 80C167CR, CAN BUS, TCP/IP, C/C++; VRTX, CVS

 

 

 



Time:       1988 – 1990
Customer:   *** ************, Naas, Ireland
Project:    Member of Development Team for Engine Tightening Unit.


Responsibilities:    
  • Hardware development of i80188 I/O Controller Card required for plant control purposes within the tightening unit. In addition an i80C152 was included to allow communication via a backplane based Starlan Bus.

     

  • Porting of PC based debugger to i80188 controller

     

  • Porting of JMI C-Executive RTOS to i80188 based I/O Controller

     

  • Development of Programmable Logic Controller (PLC) application for I/O controller which permitted plant control via Ladder Logic.  The Ladder Logic was realized through a set of PLC op-codes supported by the application with externally controlled relays and switch connected via serial lines

     

  • System Software Development for i80C152 based Starlan adapter for PC/AT which permitted control of Tightening Unit via PC based Application

     

  • Deployment of Integration Test-Rig consisting of a production line in which motor engines moved between various tightening Stations. The control logic for plant such as the engine motion and tightening movements were coded in Ladder Logic and executed on the I/O Controller card

 

Technologies:    Borland C Toolkit, Whitesmith Compiler, Intel ASM, i80188, i80C152, PLC, JMI C-Executive, Windows




Time:       1987 –1988
Customer:   ********* *********, San Leandro, California
Project:    Hardware/Firmware Development for Multiuser Network PC

Responsibilities:  

  • Development of 80286/80386 boot-up tests for a controller card designed using a CHIPS and Technologies PC chipset

     

  • Development of INT13 embedded bios features located on PC/AT card using a NCR-5380 SCSI controller

     

  • Hardware development of 8088 based PC board, based on a Faraday FE2010A (Embedded PC). 16 boards could be inserted in a custom backplane and using Novel Netware could realize a Multi-User PC solution

 


Technologies:    MASM, i8088, FE2010A, HP Logic Analyzer,  i80x86, NCR-5380



Time:       1984 – 1987
Customer:   ********* *********, Co Cork, Ireland
Project:    Gateway Products

Responsibilities:    

  • Hardware development of an Ethernet Interface Processor which performed protocol conversion between a Compucorp proprietary Network and an Ethernet Network and was built around an i80188 and an i82586 Ethernet LAN Controller Peripheral. Hardware debugging was performed with help of HP Logic Analyzer

     

  • Hardware Development of Starlan Interface Processor board to interface a Compucorp Network to a Starlan bus

     

  • Hardware design of Starlan Hub with retiming/retransmission support

     

  • Hardware / Firmware design of SCSI Interface Board plus release of finished product for mass production


Technologies:    MASM, Starlan, Ethernet, i8088, i80186, i82586, PALASM