Spezialist für FPGA-Entwicklung
Aktualisiert am 09.03.2017
Profil
Freiberufler / Selbstständiger
Verfügbar ab: 03.03.2015
Verfügbar zu: 100%
davon vor Ort: 100%
Deutsch

Einsatzorte

Einsatzorte

Deutschland, Österreich, Schweiz
nicht möglich

Projekte

Projekte

2 Monate
2016-12 - 2017-01

A-Prototype of an Automotive Communication Gateway

Contract Based
Contract Based

Activitys:

  • Specification
  • Inplimentation
  • Prototypeing
  • Triainigs & Knowlage Transfers
  • Videoprocessing
Xilinx Zynq Ultrascale+ VHDL FPGA CAN Ethernet LIN Image Processing
Automotive
3 Jahre 10 Monate
2013-04 - 2017-01

sign language translator

Project coordinator & Developer Projektmanagement, Engineering
Project coordinator & Developer

Concept

Hardware Design

Embedded Software Design

Application Software Design

Embedded Sensors, Bluetooth, Microcontrollers, C, Android NDK, T
Projektmanagement, Engineering
Ingenieurbüro Wienzek, Kalchreuth Fürth,
Fürth
8 Monate
2015-10 - 2016-05

Optical Coherence Tomography

Contract Based Development
Contract Based Development

Activitys:

  • Specification
  • Laser Control
  • Image Transformations
  • ImageBackground Subtraction
  • Resampling
  • Scaling
  • White Balanceing
  • FFT
  • Magnitude Comutation
  • Noise Reduction
  • Compression
  • Hardware Verification
Spartan 6 VHDL FPGA Laser Ethernet UDP RTP Image Processing
Laser Technology
3 Monate
2014-08 - 2014-10

Datalogger for driver assistance system

Contract Based
Contract Based

Activitys:

  • Debugging
  • Hard- and Firmware Redesign
  • Multitarget Firmware Design
  • Driver Development
FPGA VHDL Virtex7 Mentor Graphics ModelSim PCIe v3 Jungo WinDriver Device Driver Development Linux
Engineering, Ingolstadt
4 Monate
2014-04 - 2014-07

multipath HF wide band receiver system

Contract Based
Contract Based

Activitys:

  • Multi FPGA Porting
  • Toplevel Design
  • Timing & Floorplaning
  • Multi FPGA Workflow Optimization

 

FPGA VHDL Virtex5 Mentor Graphics ModelSim
Defense, Erlangen
2 Monate
2013-12 - 2014-01

KM3NeT.org Neutrino Telescope

Contract Based
Contract Based

Implementation of a Piezo-based Acoustic Sensor with AES3 Digital Readout (“Digital Piezo”) for the KM3NeT DOM Sensor network

 

Activitys:

  • Search and Conception
  • Implementation
  • Verification & Commissioning
FPGA VHDL AES3 Mentor Graphics ModelSim Lattice Diamonds 2.2 Lattice iCEcube2 Synopsys Synplify Aldec Active-HDL 9.2 Lattice iCE40
Research / Physics
7 Monate
2013-02 - 2013-08

Satellite Link Emulator

Contract Based
Contract Based

Activitys:

  • Implementation Upsampler 2x
  • Implementation Downsampler 2x
  • Implementation Upsampler 24x (@ 1,8 Giga Samples)
  • Implementation Sample Rate Converter 15/16 (@ 1,69 Giga Samples)
  • Implementation Sample Rate Converter 16/15 (@ 1,8 Giga Samples)
  • Implementation Variables Sample Rate Converter 2048/1920+n
  • (@ 1,69 Giga Samples nominal)
  • Floorplanning
  • Toplevel Integration
  • Timing Closure Virtex 6/330 MHz
  • Verification with Matlab & Modelsim
  • IFFT-Clock Domain Crossing
  • Implementation Sample Rate Conversion for dynamically changing arbitrary rational sample rate conversion
  • Umsetzung variable Signal Laufzeiten
  • 4x Upsampling
  • Floorplanning
  • Timing Closure Spartan 6/200 MHz
  • Verification with Matlab & Modelsim
FPGA VHDL Mentor Graphics ModelSim DE Xilinx ISE 14 Xilinx Spartan6 Xilinx Virtex5 Xilinx Virtex6 Synopsys Synplify Pro 2012 Matlab make
Communication Technology
8 Monate
2012-06 - 2013-01

LTE connectivity of police cars (Hamburg)

Project manager
Project manager

Activitys:

  • Preliminary study
  • Conception
  • Risk Analysis
  • Review
  • Project management
  • Hardware commissioning
  • Software Development
  • Documentation
Project management LTE VPN TCP/IP vehicle bus systems C AT90CAN128 UART circuitry
Automotive
7 Monate
2011-10 - 2012-04

FPGA based, Multidimensional Correlator

Engineering Consultant
Engineering Consultant

Activitys:

  • Cost Estimation
  • Detail conception
  • Feasibility studies
  • Design division for 12 FPGAs
  • Adaptation of existing modules / concepts implementation
  • Documentation
FPGA VHDL Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 12 Xilinx Virtex5 Synopsys Synplify Pro
Defense
3 Monate
2011-06 - 2011-08

Siebas PN CIO

Consultant FPGA-Development SIEMENS Infrastructure & Cities, Nür
Consultant FPGA-Development SIEMENS Infrastructure & Cities, Nür

Project Summary:

Design of a safety-critical (SIL 2) Compact IO module for railway applications

 

Activitys:

  • Revision of the specification
  • Resource evaluation
  • Implementation
  • Verification
FPGA VHDL Mentor Graphics ModelSim SE Altera MaxII
Rail
1 Jahr 2 Monate
2010-07 - 2011-08

IM616 CA / DPC31 Step C

Consultant FPGA-Development SIEMENS Industry, Fürth
Consultant FPGA-Development SIEMENS Industry, Fürth

Project Summary:

Design-to-Cost of a Profibus communications module for power plant applications

 

Activitys:

  • Porting the Profibus module ASIC DPC31 Step C to current FPGAs.
  • Special arrangements for the implementation in the IM616 communication module.
  • Performance Analysis
  • Timing Closure
  • Verification
  • Commissioning
FPGA VHDL Mentor Graphics ModelSim SE Xilinx ISE 11 Xilinx Spartan6 Lattice ECP3 Lattice Diamonds 1.2 Xilinx Chipscope Pro Synopsys Synplify Pro
Industrial contract development
2 Monate
2010-05 - 2010-06

RedBox PRP

Consultant FPGA-Development
Consultant FPGA-Development

Project Summary:

Concept and Implementation of the parallel Redandancy Protocol, a redundancy protocol for Ethernet networks to get through failures without interruption.

 

Activitys:

  • Implementation Concept
  • Resource and Performance Analysis
  • implementation
FPGA VHDL Functional Safty Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 11 Ethernet TCP IP PRP
Industrial contract development
3 Monate
2010-03 - 2010-05

GIBSIM SVC

Consultant FPGA-Development SIEMENS Energie, Erlangen
Consultant FPGA-Development SIEMENS Energie, Erlangen

Project Summary:

Creating FPGA simulation algorithms for the HVDC system PLUS CONTROL

 

Activitys:

  • Project Transfer
  • Reduction of logic consumption in FPGA MI
  • Partitioning of the design on 2 asynchronous FPGAs
  • Firmware change the CPLD modules

 

FPGA VHDL Functional Safty Xilinx Spartan3E Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 10 Xilinx Chipscope Pro Synopsys Synplify Pro SIL 0 (SIL 2)
Industrial contract development
5 Monate
2009-10 - 2010-02

HD-SDI Videoassist#

FPGA ? Firmware Developer
FPGA ? Firmware Developer

Activitys:

  • Implementation of BT.656 and HD-SDI video streams on 2 Gigabit Ethernet lanes (UDP, IP, RTP)
  • Conception, VHDL design, commis-sioning, Documentation
  • Cost & feasibility analysis
  • porting from Xininx Virtex4 to Spartan6
FPGA VHDL Xilinx Virtex5 Xilinx ISE 10 Mentor Graphics ModelSim SVN make BT.656 HD-SDI Gigabit-Ethernet UDP/IP RTP
Consumer-Elektronik

Aus- und Weiterbildung

Aus- und Weiterbildung

12/2011 - 12/2013: Projektmanagement 

Certification:      certificate project manager ILS

Institute:           ILS ? Institut für Lernsysteme GmbH, Hamburg

 

10/2003 - 06/2009: Electrical Engineering

Certification:      Dipl. Ing. (FH)

Institute:           University of applied sciences, Coburg

 

Focus area:

Information and Communication Technology

 

Certificates

 

12/2011 ? 12/2013

ILS ? Institut für Lernsysteme GmbH, Hamburg

Course of studies: Projektmanagement (with certificate Project manager ILS)

 

01/2017 ? 06/2017

UDACITY Mountain View, California

Deep Learning Foundation Program

Nanodegree

 

Coding Challange Winner

GitHub: https://github.com

 

03/2017 ? 12/2017

UDACITY Mountain View, California

 

Self-Driving Car Nanodegree Program

 

Nanodegree

 

Free Studies

 

01/2014 ? 04/2014

Machine Learning

Offered by Stanford University as CS229

participated via coursera

 

08/2016 ? 10/2016

Deep Learning

Offered by Google

via UDACITY

 

10/2016 ? 11/2016

Machine Learning for Trading

by Georgia Institute of Technology

Offered at Georgia Tech as CS 7646

 

11/2016 ? 01/2017

Reinforcement Learning

by Georgia Institute of Technology

Offered at Georgia Tech as CS 8803

Position

Position

Temporal and spatial availability:

Available from 01/03/2015 to 100% / 40h

EU wide operation On-site at 100% possible

Home office if requisite

citizenship Germany

 

Marital status:

Single, no children

 

Driver's License:

class B (EU)

 

Kompetenzen

Kompetenzen

Betriebssysteme

Windows

Linux

Programmiersprachen

VHDL

TCL

C

Hardware

FPGA

 

Xilinx:  Spartan 2,3,6, Virtex 4,5,6, ISE, XST, PlanAhead, Chipscope

Altera:  MaxII, Cyclon 2,3, QuartusII

Lattice: ECP 3, ispLever, Diamonds

Berechnung / Simulation / Versuch / Validierung

Mentor Graphics: ModelSim

Xilinx:          ISim

MathWorks:       Matlab

Design / Entwicklung / Konstruktion

Synopsys:        Symplify PRO

Mentor Graphics: HDL Designer, Precision Synthesis

 

Branchen

Branchen

- Defense

- Bahn

- Unterhaltungselektonik

- Industrie

- Forschung

- Automoblil & (-zulieferer)

- Medizintechnik

- Luft & Raumfahrt

Einsatzorte

Einsatzorte

Deutschland, Österreich, Schweiz
nicht möglich

Projekte

Projekte

2 Monate
2016-12 - 2017-01

A-Prototype of an Automotive Communication Gateway

Contract Based
Contract Based

Activitys:

  • Specification
  • Inplimentation
  • Prototypeing
  • Triainigs & Knowlage Transfers
  • Videoprocessing
Xilinx Zynq Ultrascale+ VHDL FPGA CAN Ethernet LIN Image Processing
Automotive
3 Jahre 10 Monate
2013-04 - 2017-01

sign language translator

Project coordinator & Developer Projektmanagement, Engineering
Project coordinator & Developer

Concept

Hardware Design

Embedded Software Design

Application Software Design

Embedded Sensors, Bluetooth, Microcontrollers, C, Android NDK, T
Projektmanagement, Engineering
Ingenieurbüro Wienzek, Kalchreuth Fürth,
Fürth
8 Monate
2015-10 - 2016-05

Optical Coherence Tomography

Contract Based Development
Contract Based Development

Activitys:

  • Specification
  • Laser Control
  • Image Transformations
  • ImageBackground Subtraction
  • Resampling
  • Scaling
  • White Balanceing
  • FFT
  • Magnitude Comutation
  • Noise Reduction
  • Compression
  • Hardware Verification
Spartan 6 VHDL FPGA Laser Ethernet UDP RTP Image Processing
Laser Technology
3 Monate
2014-08 - 2014-10

Datalogger for driver assistance system

Contract Based
Contract Based

Activitys:

  • Debugging
  • Hard- and Firmware Redesign
  • Multitarget Firmware Design
  • Driver Development
FPGA VHDL Virtex7 Mentor Graphics ModelSim PCIe v3 Jungo WinDriver Device Driver Development Linux
Engineering, Ingolstadt
4 Monate
2014-04 - 2014-07

multipath HF wide band receiver system

Contract Based
Contract Based

Activitys:

  • Multi FPGA Porting
  • Toplevel Design
  • Timing & Floorplaning
  • Multi FPGA Workflow Optimization

 

FPGA VHDL Virtex5 Mentor Graphics ModelSim
Defense, Erlangen
2 Monate
2013-12 - 2014-01

KM3NeT.org Neutrino Telescope

Contract Based
Contract Based

Implementation of a Piezo-based Acoustic Sensor with AES3 Digital Readout (“Digital Piezo”) for the KM3NeT DOM Sensor network

 

Activitys:

  • Search and Conception
  • Implementation
  • Verification & Commissioning
FPGA VHDL AES3 Mentor Graphics ModelSim Lattice Diamonds 2.2 Lattice iCEcube2 Synopsys Synplify Aldec Active-HDL 9.2 Lattice iCE40
Research / Physics
7 Monate
2013-02 - 2013-08

Satellite Link Emulator

Contract Based
Contract Based

Activitys:

  • Implementation Upsampler 2x
  • Implementation Downsampler 2x
  • Implementation Upsampler 24x (@ 1,8 Giga Samples)
  • Implementation Sample Rate Converter 15/16 (@ 1,69 Giga Samples)
  • Implementation Sample Rate Converter 16/15 (@ 1,8 Giga Samples)
  • Implementation Variables Sample Rate Converter 2048/1920+n
  • (@ 1,69 Giga Samples nominal)
  • Floorplanning
  • Toplevel Integration
  • Timing Closure Virtex 6/330 MHz
  • Verification with Matlab & Modelsim
  • IFFT-Clock Domain Crossing
  • Implementation Sample Rate Conversion for dynamically changing arbitrary rational sample rate conversion
  • Umsetzung variable Signal Laufzeiten
  • 4x Upsampling
  • Floorplanning
  • Timing Closure Spartan 6/200 MHz
  • Verification with Matlab & Modelsim
FPGA VHDL Mentor Graphics ModelSim DE Xilinx ISE 14 Xilinx Spartan6 Xilinx Virtex5 Xilinx Virtex6 Synopsys Synplify Pro 2012 Matlab make
Communication Technology
8 Monate
2012-06 - 2013-01

LTE connectivity of police cars (Hamburg)

Project manager
Project manager

Activitys:

  • Preliminary study
  • Conception
  • Risk Analysis
  • Review
  • Project management
  • Hardware commissioning
  • Software Development
  • Documentation
Project management LTE VPN TCP/IP vehicle bus systems C AT90CAN128 UART circuitry
Automotive
7 Monate
2011-10 - 2012-04

FPGA based, Multidimensional Correlator

Engineering Consultant
Engineering Consultant

Activitys:

  • Cost Estimation
  • Detail conception
  • Feasibility studies
  • Design division for 12 FPGAs
  • Adaptation of existing modules / concepts implementation
  • Documentation
FPGA VHDL Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 12 Xilinx Virtex5 Synopsys Synplify Pro
Defense
3 Monate
2011-06 - 2011-08

Siebas PN CIO

Consultant FPGA-Development SIEMENS Infrastructure & Cities, Nür
Consultant FPGA-Development SIEMENS Infrastructure & Cities, Nür

Project Summary:

Design of a safety-critical (SIL 2) Compact IO module for railway applications

 

Activitys:

  • Revision of the specification
  • Resource evaluation
  • Implementation
  • Verification
FPGA VHDL Mentor Graphics ModelSim SE Altera MaxII
Rail
1 Jahr 2 Monate
2010-07 - 2011-08

IM616 CA / DPC31 Step C

Consultant FPGA-Development SIEMENS Industry, Fürth
Consultant FPGA-Development SIEMENS Industry, Fürth

Project Summary:

Design-to-Cost of a Profibus communications module for power plant applications

 

Activitys:

  • Porting the Profibus module ASIC DPC31 Step C to current FPGAs.
  • Special arrangements for the implementation in the IM616 communication module.
  • Performance Analysis
  • Timing Closure
  • Verification
  • Commissioning
FPGA VHDL Mentor Graphics ModelSim SE Xilinx ISE 11 Xilinx Spartan6 Lattice ECP3 Lattice Diamonds 1.2 Xilinx Chipscope Pro Synopsys Synplify Pro
Industrial contract development
2 Monate
2010-05 - 2010-06

RedBox PRP

Consultant FPGA-Development
Consultant FPGA-Development

Project Summary:

Concept and Implementation of the parallel Redandancy Protocol, a redundancy protocol for Ethernet networks to get through failures without interruption.

 

Activitys:

  • Implementation Concept
  • Resource and Performance Analysis
  • implementation
FPGA VHDL Functional Safty Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 11 Ethernet TCP IP PRP
Industrial contract development
3 Monate
2010-03 - 2010-05

GIBSIM SVC

Consultant FPGA-Development SIEMENS Energie, Erlangen
Consultant FPGA-Development SIEMENS Energie, Erlangen

Project Summary:

Creating FPGA simulation algorithms for the HVDC system PLUS CONTROL

 

Activitys:

  • Project Transfer
  • Reduction of logic consumption in FPGA MI
  • Partitioning of the design on 2 asynchronous FPGAs
  • Firmware change the CPLD modules

 

FPGA VHDL Functional Safty Xilinx Spartan3E Mentor Graphics ModelSim SE Mentor Graphics HDL-Designer Xilinx ISE 10 Xilinx Chipscope Pro Synopsys Synplify Pro SIL 0 (SIL 2)
Industrial contract development
5 Monate
2009-10 - 2010-02

HD-SDI Videoassist#

FPGA ? Firmware Developer
FPGA ? Firmware Developer

Activitys:

  • Implementation of BT.656 and HD-SDI video streams on 2 Gigabit Ethernet lanes (UDP, IP, RTP)
  • Conception, VHDL design, commis-sioning, Documentation
  • Cost & feasibility analysis
  • porting from Xininx Virtex4 to Spartan6
FPGA VHDL Xilinx Virtex5 Xilinx ISE 10 Mentor Graphics ModelSim SVN make BT.656 HD-SDI Gigabit-Ethernet UDP/IP RTP
Consumer-Elektronik

Aus- und Weiterbildung

Aus- und Weiterbildung

12/2011 - 12/2013: Projektmanagement 

Certification:      certificate project manager ILS

Institute:           ILS ? Institut für Lernsysteme GmbH, Hamburg

 

10/2003 - 06/2009: Electrical Engineering

Certification:      Dipl. Ing. (FH)

Institute:           University of applied sciences, Coburg

 

Focus area:

Information and Communication Technology

 

Certificates

 

12/2011 ? 12/2013

ILS ? Institut für Lernsysteme GmbH, Hamburg

Course of studies: Projektmanagement (with certificate Project manager ILS)

 

01/2017 ? 06/2017

UDACITY Mountain View, California

Deep Learning Foundation Program

Nanodegree

 

Coding Challange Winner

GitHub: https://github.com

 

03/2017 ? 12/2017

UDACITY Mountain View, California

 

Self-Driving Car Nanodegree Program

 

Nanodegree

 

Free Studies

 

01/2014 ? 04/2014

Machine Learning

Offered by Stanford University as CS229

participated via coursera

 

08/2016 ? 10/2016

Deep Learning

Offered by Google

via UDACITY

 

10/2016 ? 11/2016

Machine Learning for Trading

by Georgia Institute of Technology

Offered at Georgia Tech as CS 7646

 

11/2016 ? 01/2017

Reinforcement Learning

by Georgia Institute of Technology

Offered at Georgia Tech as CS 8803

Position

Position

Temporal and spatial availability:

Available from 01/03/2015 to 100% / 40h

EU wide operation On-site at 100% possible

Home office if requisite

citizenship Germany

 

Marital status:

Single, no children

 

Driver's License:

class B (EU)

 

Kompetenzen

Kompetenzen

Betriebssysteme

Windows

Linux

Programmiersprachen

VHDL

TCL

C

Hardware

FPGA

 

Xilinx:  Spartan 2,3,6, Virtex 4,5,6, ISE, XST, PlanAhead, Chipscope

Altera:  MaxII, Cyclon 2,3, QuartusII

Lattice: ECP 3, ispLever, Diamonds

Berechnung / Simulation / Versuch / Validierung

Mentor Graphics: ModelSim

Xilinx:          ISim

MathWorks:       Matlab

Design / Entwicklung / Konstruktion

Synopsys:        Symplify PRO

Mentor Graphics: HDL Designer, Precision Synthesis

 

Branchen

Branchen

- Defense

- Bahn

- Unterhaltungselektonik

- Industrie

- Forschung

- Automoblil & (-zulieferer)

- Medizintechnik

- Luft & Raumfahrt

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Im Bereich Arbeitnehmerüberlassung / Personalvermittlung

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