Englisch
Activitys:
Concept
Hardware Design
Embedded Software Design
Application Software Design
Activitys:
Activitys:
Activitys:
Implementation of a Piezo-based Acoustic Sensor with AES3 Digital Readout (“Digital Piezo”) for the KM3NeT DOM Sensor network
Activitys:
Activitys:
Activitys:
Activitys:
Project Summary:
Design of a safety-critical (SIL 2) Compact IO module for railway applications
Activitys:
Project Summary:
Design-to-Cost of a Profibus communications module for power plant applications
Activitys:
Project Summary:
Concept and Implementation of the parallel Redandancy Protocol, a redundancy protocol for Ethernet networks to get through failures without interruption.
Activitys:
Project Summary:
Creating FPGA simulation algorithms for the HVDC system PLUS CONTROL
Activitys:
Activitys:
- Datenlogger Fahrerassistenzsystem
- Frexibeler Breitband HF Emfänger
- Unerwasserbojenortung
- Laufzeitvariabler Samplerateconverter
- Hardwarebasierter Korrelator
- Design-to-Cost Portierung des Profibus ASIC Bausteins DPC31 Step C auf aktuelle FPGAs
- Design einer sicherheitskritischen (SIL 2) Kompakt-IO Baugruppe für Bahnanwendungen
- FPGA-basierte Umsetzung des Parallel Redundancy Protocol (PRP)
- Erstellung von FPGA-Simulations-Algorithmen für das Hochspannungs-Gleichstrom-Übertragungs-System PLUSCONTROL
- HD-SDI Videoassistent (HD-SDI, BT656, TCP, IP, RTP)
- Untersuchung zur effizienten Berechnung von Filterkoeffizienten zur Entzerrung von Übertragungskanälen in Hardware
- Entwicklung einer seitenlastfreien Kraft- und Momentmessdose
12/2011 - 12/2013: Projektmanagement
Certification: certificate project manager ILS
Institute: ILS ? Institut für Lernsysteme GmbH, Hamburg
10/2003 - 06/2009: Electrical Engineering
Certification: Dipl. Ing. (FH)
Institute: University of applied sciences, Coburg
Focus area:
Information and Communication Technology
Certificates
12/2011 ? 12/2013
ILS ? Institut für Lernsysteme GmbH, Hamburg
Course of studies: Projektmanagement (with certificate Project manager ILS)
01/2017 ? 06/2017
UDACITY Mountain View, California
Deep Learning Foundation Program
Nanodegree
Coding Challange Winner
GitHub: https://github.com
03/2017 ? 12/2017
UDACITY Mountain View, California
Self-Driving Car Nanodegree Program
Nanodegree
Free Studies
01/2014 ? 04/2014
Machine Learning
Offered by Stanford University as CS229
participated via coursera
08/2016 ? 10/2016
Deep Learning
Offered by Google
via UDACITY
10/2016 ? 11/2016
Machine Learning for Trading
by Georgia Institute of Technology
Offered at Georgia Tech as CS 7646
11/2016 ? 01/2017
Reinforcement Learning
by Georgia Institute of Technology
Offered at Georgia Tech as CS 8803
Temporal and spatial availability:
Available from 01/03/2015 to 100% / 40h
EU wide operation On-site at 100% possible
Home office if requisite
citizenship Germany
Marital status:
Single, no children
Driver's License:
class B (EU)
Windows
Linux
VHDL
TCL
C
FPGA
Xilinx: Spartan 2,3,6, Virtex 4,5,6, ISE, XST, PlanAhead, Chipscope
Altera: MaxII, Cyclon 2,3, QuartusII
Lattice: ECP 3, ispLever, Diamonds
Mentor Graphics: ModelSim
Xilinx: ISim
MathWorks: Matlab
Synopsys: Symplify PRO
Mentor Graphics: HDL Designer, Precision Synthesis
- Defense
- Bahn
- Unterhaltungselektonik
- Industrie
- Forschung
- Automoblil & (-zulieferer)
- Medizintechnik
- Luft & Raumfahrt
Activitys:
Concept
Hardware Design
Embedded Software Design
Application Software Design
Activitys:
Activitys:
Activitys:
Implementation of a Piezo-based Acoustic Sensor with AES3 Digital Readout (“Digital Piezo”) for the KM3NeT DOM Sensor network
Activitys:
Activitys:
Activitys:
Activitys:
Project Summary:
Design of a safety-critical (SIL 2) Compact IO module for railway applications
Activitys:
Project Summary:
Design-to-Cost of a Profibus communications module for power plant applications
Activitys:
Project Summary:
Concept and Implementation of the parallel Redandancy Protocol, a redundancy protocol for Ethernet networks to get through failures without interruption.
Activitys:
Project Summary:
Creating FPGA simulation algorithms for the HVDC system PLUS CONTROL
Activitys:
Activitys:
- Datenlogger Fahrerassistenzsystem
- Frexibeler Breitband HF Emfänger
- Unerwasserbojenortung
- Laufzeitvariabler Samplerateconverter
- Hardwarebasierter Korrelator
- Design-to-Cost Portierung des Profibus ASIC Bausteins DPC31 Step C auf aktuelle FPGAs
- Design einer sicherheitskritischen (SIL 2) Kompakt-IO Baugruppe für Bahnanwendungen
- FPGA-basierte Umsetzung des Parallel Redundancy Protocol (PRP)
- Erstellung von FPGA-Simulations-Algorithmen für das Hochspannungs-Gleichstrom-Übertragungs-System PLUSCONTROL
- HD-SDI Videoassistent (HD-SDI, BT656, TCP, IP, RTP)
- Untersuchung zur effizienten Berechnung von Filterkoeffizienten zur Entzerrung von Übertragungskanälen in Hardware
- Entwicklung einer seitenlastfreien Kraft- und Momentmessdose
12/2011 - 12/2013: Projektmanagement
Certification: certificate project manager ILS
Institute: ILS ? Institut für Lernsysteme GmbH, Hamburg
10/2003 - 06/2009: Electrical Engineering
Certification: Dipl. Ing. (FH)
Institute: University of applied sciences, Coburg
Focus area:
Information and Communication Technology
Certificates
12/2011 ? 12/2013
ILS ? Institut für Lernsysteme GmbH, Hamburg
Course of studies: Projektmanagement (with certificate Project manager ILS)
01/2017 ? 06/2017
UDACITY Mountain View, California
Deep Learning Foundation Program
Nanodegree
Coding Challange Winner
GitHub: https://github.com
03/2017 ? 12/2017
UDACITY Mountain View, California
Self-Driving Car Nanodegree Program
Nanodegree
Free Studies
01/2014 ? 04/2014
Machine Learning
Offered by Stanford University as CS229
participated via coursera
08/2016 ? 10/2016
Deep Learning
Offered by Google
via UDACITY
10/2016 ? 11/2016
Machine Learning for Trading
by Georgia Institute of Technology
Offered at Georgia Tech as CS 7646
11/2016 ? 01/2017
Reinforcement Learning
by Georgia Institute of Technology
Offered at Georgia Tech as CS 8803
Temporal and spatial availability:
Available from 01/03/2015 to 100% / 40h
EU wide operation On-site at 100% possible
Home office if requisite
citizenship Germany
Marital status:
Single, no children
Driver's License:
class B (EU)
Windows
Linux
VHDL
TCL
C
FPGA
Xilinx: Spartan 2,3,6, Virtex 4,5,6, ISE, XST, PlanAhead, Chipscope
Altera: MaxII, Cyclon 2,3, QuartusII
Lattice: ECP 3, ispLever, Diamonds
Mentor Graphics: ModelSim
Xilinx: ISim
MathWorks: Matlab
Synopsys: Symplify PRO
Mentor Graphics: HDL Designer, Precision Synthesis
- Defense
- Bahn
- Unterhaltungselektonik
- Industrie
- Forschung
- Automoblil & (-zulieferer)
- Medizintechnik
- Luft & Raumfahrt
Direktester geht's nicht! Ganz einfach Freelancer finden und direkt Kontakt aufnehmen.