a Randstad company

Senior FPGA Expert, Embedded SW Developer (Embedded Linux, Rust, C/C++, Python), SW Project Manager, FuSi Engineer (ISO 26262)

Profil
Referenzen (3)

"We confirm that the Consultant has worked in our company from the 13. January 2020 until the 31. October 2020 in the role of external Electronic Design Engineer. [...] The area of responsibility for the Consultant was complex and challenging. Due to his advanced skills and knowledge he quickly progressed into his area of responsibility. He had varied practical knowledge coupled with sound professional expertise. He analyzed challenging problems very well and in a logical manner. In addition he could independently develop possible solutions. His well-considered solutions to the problems were the main contributing factors to successful implementations. The Consultant completed his tasks, even under difficult circumstances. His performance in terms of both quality and quantity always satisfied our expectations. His attitude towards managers and members of staff was always cooperative and team-minded. We would like to thank him for his close and friendly collaboration with our team as it was a pleasure to work with him."

— Projects FPGA Architecture, Implementation of Lidar and multi-camera-based 3D environment scanner, 01/20 - 10/20
Reference from R&D Director Electronics, leader for survey solutions, from 8. December 2020

" The consultant independently worked on relatively big and complexe projects within our organisation as well as supporting our engineers with complete smaller sub projects. [...] We can confirm the consultant has an excellent knowledge in the area of digital communication. He completed any work assigned to him absolutely in time and budget. Furthermore he is very creative with excellent skills in graphical design that allowed him to set-up convincing demos and documentation for the above projects. [...] We would come back to him as independent consultant at any time if the situation allows."

— Project Various Projects, 09/02 - 09/09
Reference from General Manager, Sony, from 24.09.09

"[...] Er hat das Projekt in allen Phasen von der Spezifikation über die Entwicklungs- und Testphase bis hin zur Inbetriebnahme geleitet. Die von ihm entwickelten Applikationen laufen fehlerfrei und performant. Er zeigte bei seinen Arbeitsaufgaben sehr hohen persönlichen Einsatz und eine hervorragende Leistung, sowohl in fachlicher als auch in menschlicher Hinsicht. Der Consultant ist ein äußerst engagierter, zuverlässiger und aktiver Berater. Er zeichnet sich durch ein sehr hohes Maß an Kreativität, Eigeninitiative und ein sehr gutes analytisch-konzeptionelles Urteils- und Denkvermögen aus. Er verfügt über ein profundes Wissen in PHP5 und in den zum Einsatz gekommenen Software-Lösungen MediaWiki und Redaxo und hat umfassende Kenntnisse aus allen Bereichen des Internets. Der gesamte Auftrag und alle enthaltenen (Teil-) Projekte wurden termingerecht und ohne Kostenüberschreitung abgeschlossen. Der Consultant hat unseren Erwartungen und Anforderungen in jeder Hinsicht und in allerbester Weise entsprochen und war als Projektleiter und Berater bei Unternehmensleitung und Mitarbeitern anerkannt und beliebt. Wir freuen uns auch weiterhin auf eine gute und freundliche Zusammenarbeit und möchten ihn darüberhinaus auch anderen Firmen empfehlen."

— Projekt Entwicklung eines Dokumentationsmanagementsystems, 03/09 - 09/09
Referenz durch Geschäftsführer, Amicon GmbH, vom 22.09.09
Top-Skills
Senior FPGA/SoC Expert FPGA Architect Image Processing Expert FPGA VHDL Python C/C++ Image Processing Mobile Communications ISO26262 Embedded Linux Projektmanagement
Verfügbar ab
09.01.2023
Bald verfügbar - Für planbare Projekte: Der Experte steht für neue Folgeprojekte zur Verfügung.
Verfügbar zu
80%
davon vor Ort
20%
Einsatzorte

PLZ-Gebiete
Länder
Ganz Deutschland, Österreich, Schweiz

Einsatz europaweit remote

Remote-Arbeit
möglich
Art des Profiles
Freiberufler / Selbstständiger
Der Experte ist als Einzelperson freiberuflich oder selbstständig tätig.

1 Jahr 6 Monate

2021-06

heute

FPGA Architecture of large image processing SoC

FPGA Architect High speed imaging Sensor Fusion IEC 62304
Rolle
FPGA Architect
Projektinhalte

  • FPGA Architecture
  • Image processing and sensor fusion
  • High-speed interfacing

Produkte
Enterprise Architect MS Visio MS Excel Python Xilinx Vivado Siemens Questa Xilinx Zynq MPSoC ZU19EG
Kenntnisse
High speed imaging Sensor Fusion IEC 62304
Kunde
WaveLight GmbH
10 Monate

2021-06

2022-03

Zstd Compression Algorithm for small FPGAs

Senior FPGA Developer VHDL Python UVM ...
Rolle
Senior FPGA Developer
Projektinhalte

Concept, design and implementation of a ZSTD compressor IP Core

  • Zstd dictionary based data compression
  • RIF radar data
  • Lattice Crosslink NX (LIFCL-40)

Produkte
Lattice Crosslink NX zStandard Compression
Kenntnisse
VHDL Python UVM Siemens Questa Visual Studio Code Python VUNIT
Kunde
Vector Informatik GmbH
1 Jahr

2020-01

2020-12

FPGA Architecture and Implementation

FPGA Architect, VHDL Developer, Embedded Linux developer VHDL VHDL Verification UVM ...
Rolle
FPGA Architect, VHDL Developer, Embedded Linux developer
Projektinhalte

FPGA Architecture and Implementation of Lidar and multi-camera-based 3D environment scanner

  • FPGA Architecture, design of CV and sensor fusion modules and high-speed interfaces
Produkte
Microsemi Libero Microsemi Polarfire FPGA Mentor Graphics Questa Mentor Graphics Visualizer MS Visual Studio
Kenntnisse
VHDL VHDL Verification UVM Embedded C++ Python Android ADB Linux Device Driver Embedded Linux Sensor Fusion AXI4 PCIe FPGA Embedded Linux Yocto Open Embedded QEMU  Functional Verification (UVM)
Kunde
LEICA Geosystems AG
Einsatzort
Schweiz
1 Jahr 1 Monat

2018-12

2019-12

FPGA Architecture and Implementation

FPGA Architect, VHDL/ SystemVerilog Developer Python Android ADB C/C++ ...
Rolle
FPGA Architect, VHDL/ SystemVerilog Developer
Projektinhalte

FPGA Architecture and Implementation of Lidar, multi-camera and IMU (SLAM) based 3D Scanner

  • Design and implementation of Lidar 3D scanner, image processing and sensor fusion modules on FPGA
Produkte
Microsemi Libero Microsemi Polarfire FPGA Mentor Graphics Questa Ultra Mentor Graphics Questa Formal/CDC
Kenntnisse
Python Android ADB C/C++ VHDL Verification VHDL System Verilog UVM AXI4 Sensor Fusion AXI4 PCIe FPGA VHDL SystemVerilog (UVM) Functional/ Formal Verification
Kunde
LEICA Geosystems AG
Einsatzort
Schweiz
6 Monate

2018-06

2018-11

FPGA Architecture and Implementation

FPGA Architect, VHDL Developer VHDL FPGA C/C++ ...
Rolle
FPGA Architect, VHDL Developer
Projektinhalte

FPGA Architecture and Implementation of welding current source controlling FPGA

  • Architectural design and implementation of welding current source control on FPGA
Produkte
Altera MAX-Plus Altera Quartus 2 Mentor Graphics Questa Prime MATLAB SVN
Kenntnisse
VHDL FPGA C/C++ MATLAB Tcl/Tk
Kunde
Lorch Schweißtechnik GmbH
1 Jahr

2017-08

2018-07

Setup of a generic vehicle data annotation project

Executive Consultant Automotive Data Annotation Project Management
Rolle
Executive Consultant
Projektinhalte

Concept of generic automotive Data Annotation Project Setup

  • Setup and tailoring of automotive image data annotation project
  • Project management
  • Process Definition
  • Implementation
  • Rollout
Kenntnisse
Automotive Data Annotation Project Management
Kunde
CMORE Automotive GmbH
Einsatzort
Lindau
7 Monate

2017-12

2018-06

Image data logistics processes

Project Manager Project Management
Rolle
Project Manager
Projektinhalte

Definition and implementation of Image Data Logistics Processes

  • Analysis, definition and implementation of automotive data annotation processes
  • implementation and rollout of supporting production software
Produkte
Python Django Oracle 11
Kenntnisse
Project Management
Kunde
CMORE Automotive GmbH
Einsatzort
Lindau
8 Monate

2017-09

2018-04

cryptographic UDP/TCT/IP packet filters

Software Developer Linux Ethernet System Architecture ...
Rolle
Software Developer
Projektinhalte

Test system for Production-End-of-Line tests of cryptographic UDP/TCT/IP packet filters

  • Concept of end of line tests
  • definition of test campaigns
  • test engineering
  • test management
Produkte
Python 3 C/C++ Linux
Kenntnisse
Linux Ethernet System Architecture HW/SW Setup Test Development UDP TCP/IP Firewalls Cybersecurity Krypto
Einsatzort
Stuttgart Weilimdorf
3 Monate

2017-10

2017-12

Management of Data Annotation Projects

Project Manager Project management process review
Rolle
Project Manager
Projektinhalte

Customer Project Management of Data Annotation Projects

  • Team, timeline, budget & revenue of international data annotation customer project
Kenntnisse
Project management process review
Kunde
Daimler AG
2 Monate

2017-08

2017-09

Camera SoC based Security Gate for Pedestrians

System Architect FPGA SoC VHDL ...
Rolle
System Architect
Projektinhalte

Proof of Concept, System Architecture: Camera SoC based Security Gate for Pedestrians

  • Design of suitable stereo image processing algorithm and SoC system architecture
  • Stereo image processing, SoC system architecture, Algorithm design
Produkte
Xilinx Spartan 6 Microsemi Libero SoC Microsemi SmartFusion 2 Mentor Questa Matlab
Kenntnisse
FPGA SoC VHDL C/C++ MATLAB Python
Kunde
METO International GmbH
Einsatzort
Remote
4 Monate

2017-05

2017-08

Automotive Data Annotation Project

Project Manager Project Management
Rolle
Project Manager
Projektinhalte

Project Lead of Automotive Data Annotation Project

  • Project & Data Logistics Management for international Team (3 Locations, 120 employees)
Kenntnisse
Project Management
Kunde
CMORE Automotive GmbH
Einsatzort
Lindau
6 Monate

2017-03

2017-08

Integration of Lossless-JPEG encoder

FPGA Developer FPGA SoC VHDL ...
Rolle
FPGA Developer
Projektinhalte

Integration of Lossless-JPEG encoder in FPGA frame grabber

  • Integration of LL-JPEG Encoder in VHDL frame grabber design
  • FPGA Test Framework
  • C++ Implementation of LL-JPEG Decoder
Produkte
Xilinx Spartan 6 Microsemi Libero SoC Microsemi SmartFusion 2 Mentor Questa Matlab
Kenntnisse
FPGA SoC VHDL C/C++ MATLAB Python
Kunde
ViGEM GmbH
Einsatzort
Remote
1 Jahr

2016-04

2017-03

SoC/ FPGA design of a driver assistance system

SoC FPGA High-Level-Synthesis ...
Projektinhalte

SoC/ FPGA Design of Multi-Camera based Driver Assistance System

  • Functional Safety ISO 26262
  • Fault Analysis & Safety Mechanism Verification
  • Formal Verification
  • SoC Architecture
  • ADAS Algorithm Implementation
  • Algorithm Design
  • FPGA Test Framework
Produkte
Xilinx Zynq Vivado HLS SDSoC Mentor Questa Mentor Formal MS Visual Studio MS Team Foundation Server Doors
Kenntnisse
SoC FPGA High-Level-Synthesis VHDL C/C++ TCL Python Multi-Camera Image Data Processing
Kunde
SMR Automotive Mirrors Stuttgart GmbH, Samvardhana Motherson Group
Einsatzort
Stuttgart
1 Jahr 4 Monate

2015-04

2016-07

Test management of radar sensors

Test Management Radar Algorithm Test Management
Rolle
Test Management
Projektinhalte

Algorithm Test Management of 4th Generation Radar Sensors

  • Code Reviews
  • Test Reviews
  • Test Planning
  • Test Campaigns
  • Issue Tracking
  • Test Coverage
  • Requirements Coverage
  • Static/Dynamic White and Black Box Tests
  • Test Reports
  • Test Metrics
  • Functional Safety, DIN ISO 26262
Produkte
QA-C Cantata Doors MKS Integrity MS Visual Studio MS Project MS Office
Kenntnisse
Radar Algorithm Test Management
Kunde
ADC GmbH, Continental AG
Einsatzort
Lindau
2 Jahre 5 Monate

2012-09

2015-01

Design of a driver assistance system

FPGA and ASIC Implementation, Algorithm Design Stereo Image Data Processing FPGA ASIC ...
Rolle
FPGA and ASIC Implementation, Algorithm Design
Projektinhalte

FPGA/ ASIC Design of Stereo Camera based Driver Assistance System

  • FPGA and ASIC Implementation
  • Algorithm Design
  • Software Reference Model Implementation
  • Test Framework
  • HW Emulation
  • Module and Regression Testcases
  • TopLevel Tests
Produkte
MS Visual Studio Mentor Questa Mentor Veloce Doors MKS Integrity
Kenntnisse
Stereo Image Data Processing FPGA ASIC VHDL Verilog C/C++ TCL Python
Kunde
ADC GmbH, Continental AG
Einsatzort
Lindau
1 Jahr

2011-09

2012-08

FPGA Design for Stereo Image Processing

FPGA Implementation, Algorithm Design, Test Framework Stereo Image Processing Algorithm Design VHDL ...
Rolle
FPGA Implementation, Algorithm Design, Test Framework
Projektinhalte
  • FPGA Implementation
  • Algorithm Design
  • Software Reference Model Implementation
  • Test Framework
  • Testbenches
  • Module and Regression Testcases
Produkte
Mentor Modelsim Xilinx ISE Xilinx Spartan-6 Doors MKS Integrity MS Visual Studio
Kenntnisse
Stereo Image Processing Algorithm Design VHDL C/C++ TCL Python
Kunde
ADC GmbH, Continental AG
Einsatzort
Lindau
2 Monate

2011-07

2011-08

Implementation and Test of various Software Wrappers

Software Implementation, Test Framework Implementation, Regressi Matlab C/C++ Python ...
Rolle
Software Implementation, Test Framework Implementation, Regressi
Produkte
Komodo IDE PyDev Matlab SVN
Kenntnisse
Matlab C/C++ Python NumPy SciPy
Kunde
Zeiss SMT
Einsatzort
Oberkochen
1 Jahr

2010-08

2011-07

Design, HW implementation and test of various UMTS and GSM EDGE enhancements

Algorithm Design, Model-Based Design, System Architecture, FPGA UMTS GSM EDGE ...
Rolle
Algorithm Design, Model-Based Design, System Architecture, FPGA
Projektinhalte

Algorithm Design, Model-Based Design, System Architecture, FPGA Implementation

Produkte
Matlab Simulink Xilinx System Generator Xilinx Virtex 5 Xilinx ISE Mentor Modelsim SVN
Kenntnisse
UMTS GSM EDGE Multi Carrier CDMA MC-CDMA OFDM VSWR Alpha-QPSK VAMOS VHDL
Kunde
Alcatel Lucent Deutschland AG
Einsatzort
Stuttgart
5 Monate

2010-03

2010-07

Specification and Implementation of a SoC HW/SW-Controller used in 50W wireless tranceiver

Model-Based Design, Algorithm Design, Requirements Engineering Requirements Engineering DOORS Embedded Systems ...
Rolle
Model-Based Design, Algorithm Design, Requirements Engineering
Projektinhalte

Model-Based Design, Algorithm Design, HW Implementation, Requirements Engineering

Produkte
Virtex 6 Xilinx ISE
Kenntnisse
Requirements Engineering DOORS Embedded Systems PowerPC C/C++ VHDL
Kunde
Thales Deutschland GmbH, Defense and Security Systems
Einsatzort
Pforzheim
7 Monate

2009-12

2010-06

Evaluation and model-based implementation of a SW Defined Radio tranceiver signal path

Toolchain Evaluation, Model-Based Proof of Concept Mulltirate Signal Processing Polyphase Filtering Algorithm Design ...
Rolle
Toolchain Evaluation, Model-Based Proof of Concept
Produkte
Matlab Simulink Xilinx System Generator Mentor Modelsim Xilinx Virtex 5 Xilinx ISE
Kenntnisse
Mulltirate Signal Processing Polyphase Filtering Algorithm Design VHDL
Kunde
Thales Deutschland GmbH, Defense and Security Systems
Einsatzort
Pforzheim
8 Monate

2009-04

2009-11

Design and implementation of MIMO Powerline OFDM Communication System Blocks

Algorithm Design, Model-Based Algorithm Design, HW Implementatio OFDM Channel Estimation Algorithm Design VHDL ...
Rolle
Algorithm Design, Model-Based Algorithm Design, HW Implementatio
Projektinhalte

Model based design and implementation of various Powerline OFDM algorithms

Produkte
Matlab Simulink Xilinx System Generator Modelsim SoC Xilinx Virtex 5 Xilinx ISE SVN
Kenntnisse
OFDM Channel Estimation Algorithm Design VHDL C/C++
Kunde
Sony Deutschland GmbH
Einsatzort
Stuttgart
1 Jahr 10 Monate

2007-05

2009-02

System design, HW-/SW implementation of a PLC Modem Testbench

Project Management, Requirements Engineering, HW-/SW-Implementat Gentoo Linux XML-RPC TCP/IP ...
Rolle
Project Management, Requirements Engineering, HW-/SW-Implementat
Projektinhalte

System design, HW-/SW implementation, test and administration of a PLC modem testbench realized as a distributed system

Project Management, Requirements Engineering, Model-Based Proof of Concept, HW-/SW-Implementation, Acquisition of real world PLC Channel Measurements

Produkte
Matlab Simulink Netperf iPerf Xilinx ISE Mentor Modelsim SVN
Kenntnisse
Gentoo Linux XML-RPC TCP/IP PCI VHDL Python C/C++
Kunde
Sony Deutschland GmbH
Einsatzort
Stuttgart
1 Monat

2008-02

2008-02

ETSI Consultation RFID (ETSI SCP#36)

Paper Review and ETSI Voting RFID NFC
Rolle
Paper Review and ETSI Voting
Projektinhalte

RFID Paper Review, ETSI Voting

Kenntnisse
RFID NFC
Kunde
DoCoMo Communications Lab. Europe GmbH
Einsatzort
Munich
5 Monate

2006-12

2007-04

Internal White Paper: Line of Sight Communication Link in Highly Disturbed Gaussian Channels

Model-Based System Design and Evaluation Transmission Mode Channel Coding Channel Estimation
Rolle
Model-Based System Design and Evaluation
Projektinhalte

Transmission Mode, Channel Coding, Channel Estimation, Proof of Concept

Produkte
Matlab Simulink
Kenntnisse
Transmission Mode Channel Coding Channel Estimation
Einsatzort
Japan, USA
2 Jahre

2005-05

2007-04

SW implementation of OFDM Communication Algos

Algorithm Design, SW Implementation Baseband Channel Estimation IQ Generator ...
Rolle
Algorithm Design, SW Implementation
Projektinhalte

TI TM320C55x DSP, Baseband, Channel Estimation, IQ Generator, Baseband Filter, Down Conversion

Produkte
Matlab Simulink Fixed Point Toolbox Filter Design Toolbox TI Code Composer Studio TI TM320C55x
Kenntnisse
Baseband Channel Estimation IQ Generator Baseband Filter Down Conversion C/C++ Assembler
Kunde
Sony International (Europe) GmbH
Einsatzort
Stuttgart
1 Jahr 1 Monat

2004-11

2005-11

Theoretical analysis and fixed-point algorithm design of OFDM communication algorithms

Model-Based Algorithm Design OFDM Fixed-Point Conversion
Rolle
Model-Based Algorithm Design
Projektinhalte

Algorithm Design, Model-Based Algorithm Design, OFDM, Fixed-Point

Produkte
Matlab Simulink Fixed Point Toolbox Fixed Point Blockset Filter Design Toolbox Filter Design Toolbox Communications Toolbox Communications Blockset
Kenntnisse
OFDM Fixed-Point Conversion
Kunde
Sony International (Europe) GmbH
Einsatzort
Stuttgart
1 Jahr 7 Monate

2002-09

2004-03

Design and simulation of architectures and algorithms of OFDM communication systems

Model-Based Algorithm Design, Algorithm Design, System Architect Adaptive OFDM Channel Estimation Wiener Filter OFDM Symbol Synchronization
Rolle
Model-Based Algorithm Design, Algorithm Design, System Architect
Projektinhalte

Model-Based Algorithm Design, Algorithm Design, System Architect, Digital Radio, adaptive OFDM channel estimation, Wiener Filter, OFDM symbol synchronization

Produkte
Matlab Simulink Filter Design Toolbox Filter Design Blockset Communications Toolbox Communications Blockset
Kenntnisse
Adaptive OFDM Channel Estimation Wiener Filter OFDM Symbol Synchronization
Kunde
Sony International (Europe) GmbH
Einsatzort
Stuttgart

Studium - Elektrotechnik und Informationstechnik
Universität Stuttgart
Abschluss: Diplom-Ingenieur
 
Weiterbildung
  • Certified Project Management Associate IPMA Level D
  • TÜV Rheinland Functional Safety Engineer (Automotive ISO 26262)
  • Safety Analysis FMEA & FMEDA
  • Mentor Graphics Vanguard Partner
  • FPGA Functional Verfication
  • Doulos - Developing with Embedded Linux
  • Doulos - C++ Programming For Embedded Systems

  • Senior FPGA Expert
  • Embedded Software Developer
  • Project Manager 
  • Functional Safety Engineer (ISO 26262)

Deutsch Muttersprache
Englisch sehr gut in Wort und Schrift (internationale Auftraggeber aus USA / Japan)
Französisch Grundkenntnisse

Top Skills
Senior FPGA/SoC Expert FPGA Architect Image Processing Expert FPGA VHDL Python C/C++ Image Processing Mobile Communications ISO26262 Embedded Linux Projektmanagement
Produkte / Standards / Erfahrungen / Methoden
Alpha-QPSK Altera Quartus Android ADB AXI4 Doors Embedded Linux Gentoo Linux GSM Matlab Communications Toolbox Matlab Filter Design Toolbox Matlab Fixed Point Toolbox Matlab Simulink Matlab/Simulink Communications Blockset Matlab/Simulink Filter Design Blockset Matlab/Simulink Fixed Point Blockset Mentor Graphics Questa Formal/CDC Mentor Graphics Questa Prime Mentor Veloce Microsemi Libero Microsemi Polarfire FPGA MKS Integrity MS Project MS Visual Studio Multi Carrier OFDM PCIe Requirements Engineering UMTS UVM VAMOS Verilog VHDL Verification Vivado HLS Xilinx ISE Xilinx System Generator
  • Implementierung USB Infiniband Converter, Testsignal-Generator (VHDL, Ansi C/C++, Tk/Tcl, HPUX)
  • Implementierung USB 1.1 Controller auf 8051 (Ansi C/C++)
  • DRM Software Radio (TI Code Composer Studio, C/C++, TI Assembler)
  • Endace DAG Network Monitoring Cards in script-controlled automatic testbench (Python, Gentoo Linux)
  • Realtime simulation of Powerline Channels in Xilinx Virtex 5 FPGA (VHDL, Python, Gentoo Linux)
  • MIMO Demonstrator on Xilinx Virtex 5 (VHDL, Linux Treiber, Python)
 
Erfahrungen im Bereich
  • Entwurf und Simulation von Systemen, Systemarchitekturen und Algorithmen von digitalen OFDM Übertragungssystemen
  • Entwurf hochoptimierter Festkomma-Algorithmen zur Realisierung auf FPGAs/ASICs und Festkomma-DSPs
  • Hardware- und Software Implementierung auf Altera/Xilinx FPGAs und Texas Instruments DSPs
  • Hardware- und Software-Tests, automatisierte skriptgesteuerte Tests, Testbenches, Testplanung, Testreports, Testmanagement, Last- und Regressionstests, Blackbox Tests, Whitebox Tests
  • Entwurf und Implementierung von Content-Management-Systemen (CMS)
  • Anpassung und Erweiterung von Content-Management-Systemen, Webshops/eShops, Wikis

Methoden
  • Theoretische Analyse, Aufwandsabschätzung, Simulation
  • (Feld-) Tests unter realen Bedingungen (Implementierung, Durchführung)
  • Objektorientierte und strukturierte Programmierung
  • Entwurf, Implementierung und Administration relationaler Datenbanken
  • Testgetriebene Entwicklung, Unittests, Regressions- und Lasttests, Blackbox und Whitebox Tests


Tools/Produkte

  • Matlab / Simulink
  • Xilinx System Generator, Xilinx ISE, Xilinx Virtex 4/5
  • Modelsim
  • TI Code Composer Studio, TI TM320C55x DSP (TI Assembler, C/C++)
  • mySQL, dBase, Clipper 5.x, Visual Objects 2.x
  • Eclipse IDE (PHP 5.x, Python 2.x, C/C++), ZEND Studio (PHP 4/5)
  • Zend Framework, Smarty, Javascript Frameworks (jQuery, Dojo), Ajax
  • MS Office (Word, Excel, Powerpoint, Visio)
  • Adobe CS4/5 (Photoshop, Illustrator, Dreamweaver)
  • (Gentoo) Linux
  • Installation, Administration
  • Netzwerk, TCP/IP
  • Verteilte Systeme
  • Linux Treiber Entwicklung
  • Einbindung Testhardware (HP/ Agilent/ Rohde & Schwarz/ GPIB/ RS 232)

Spezialkenntnisse
  • Mobilfunk-Übertragungskanal/-kanäle
  • Kanalschätzung, Synchronisation und Codierung in OFDM Übertragungssystemen
  • Adaptive Filter
  • Regression Tests, Blackbox/Whitebox Tests, Bus Functional Models
  • Kanalschätzung MIMO-PLC (Powerline Communication)
  • LAMP/ WAMP
  • Internet/ Intranet (Aufbau, Technologien, 7-Schichten-Modell)
  • Design
  • Programmierung
  • Datenbank (DB) - Anbindung
  • Administration (WWW, XHTML, CSS, HTTP, CGI, TCP/IP)
Betriebssysteme
Embedded Linux HPUX
Visual HDL
Linux
Gentoo Linux, Adminstration, Samba, Apache, Sendmail/qmail, Imap, Linux-Treiber (Linux Driver Programming), Apache, LAMP, verteilte Systeme (distributed systems), PHP, Python
Linux Device Driver Mac OS
Mac OS X Administration
MS-DOS
Administration, Batch Programming
Windows
Entwicklung, Administration
Programmiersprachen
Assembler
Texas Instruments (TI) DSPs
C C++ Embedded C++ LabView
Mess-/Testgeräte Ansteuerung
MATLAB / Simulink NumPy PHP
PHP5, Zend Framework, Zend Studio for Eclipse, CMS, WebShops, Redaxo, OXID
PyDev Python 3
Web Middleware, Scripting in verteilten Systemen
SciPy System Verilog Tcl/Tk
Hardware Control, Test Automation
TeX, LaTeX
Dokumentation, Diplom-Arbeit, Formatierung Dissertation
VHDL
Datenbanken
MySQL
Datenbank-Entwurf, Administration, LAMP, WAMP
Oracle 11 SQL xBase
Data-Mining, komplexe Auswerte-/Abfrage-Algorithmen
Datenkommunikation
Bus
Firewire (IEEE 1394), USB1.1, Treiber
Ethernet
Linux Device Driver
Internet, Intranet
Administration mittelgroßer Netze mit Windows / Linux Server (100-200 Arbeitstationen, Dokument-Server, Mailserver, CMS, Wiki, SVN)
IP RPC
Linux/Python basierte verteilte Systeme
RS232 TCP/IP
Linux Socket Programmierung
UDP/IP
Linux Socket Programmierung
Layer 0 in mobilen (Digital Broadcast / Mobile Communication) und drahtgebundenen (Powerline Communication PLC) SISO- und MIMO Systemen.
Hardware
ASIC FPGA
Microsemi Polarfire/Smartfusion 2, Xilinx Spartan 6, Virtex 4/5/6/7, Zynq SoC
Hardware entwickelt
Digitale COFDM Communication Systeme (DRM, PLC), Powerline Demonstrator, GSM/EDGE/UMTS Implementierungen, Stereo Vision Algorithmen
Mentor Graphics Questa Mentor Graphics Visualizer Mikrocontroller
8051, ARM
Modem
Powerline Communications (PLC)
Xilinx SDSoC Xilinx Spartan 6 Xilinx Virtex
6, 7
Xilinx Vivado Xilinx Zynq SoC
Berechnung / Simulation / Versuch / Validierung
Radar Processing Stereo Image Processing
Design / Entwicklung / Konstruktion
Adaptive OFDM Channel Estimation Algorithm Design Baseband Baseband Filter Channel Coding Channel Estimation Down Conversion Fixed-Point Conversion High-Level-Synthesis IQ Generator Mulltirate Signal Processing Multi-Camera Image Data Processing OFDM Channel Estimation OFDM Symbol Synchronization Polyphase Filtering Stereo Image Processing Transmission Mode Wiener Filter
Managementerfahrung in Unternehmen
Automotive Data Annotation Project Management

  • Automotive ADAS
  • Nachrichtentechnik, Nachrichtenübertragung, Communications 
  • Consumer Electronics
  • Netzwerkausrüster, Mobile Communications
  • Verteidigungstechnik und Sicherheitstechnik, Defence & Security
  • Forschungseinrichtungen/ Universitäten
Ihr Kontakt zu Gulp

Fragen? Rufen Sie uns an +49 89 500316-300 oder schreiben Sie uns:

Jetzt bei GULP Direkt registrieren und Freelancer kontaktieren