Profile:

My main interest goes to the digital side of mixed-signal design, especially in connection with signal processing, with emphasis on a hardware-software codesign. I can think for myself, and as a consequence come up with new and different solutions. Cost and time to market are as important for me as technical excellence. Work on intellectually rewarding projects is an important motivation for me as are trust and responsibility. I see teamwork not just as dividing work up between people, but as room for open discussion, being a consultant and consulting others when necessary.

Tools:

network server 

• apache
• squid
• dokuwiki
• postfix
• dovecot (and more)

RTL synthesis

• RTL Compiler
• Ambit
• Design Compiler
• Leonardo
• Quartus

Simulation 

• NC Sim
• Modelsim
• Affirma
• Spectre
• Ultrasim
• Hsim
• Eldo

Analysis 

• Leda
• Formality
• Primetime

Design Environment 

• Cadence 5.x
• Mentor Graphics

Layout editor 

• Cadence Virtuoso & Encounter
• Mentor tools

Development environments

• Emacs/Makefiles
• MS VC++

Version control systems

• bzr
• subversion
• cvs

Employment History:

2011-12 - heute

Kunde: auf Anfrage

Aufgaben:

• a full network stack including cryptography, flow/congestion control and presentation layer on top
• Modernizing Gforth and the Forth language to be fit for such a task
• Designing and implementing a GUI framework (called MINOS2) which is fit for the task, fast and portable
• Operating automatic test and build server with Gitlab EE
• Building for docker, snap, flatpak, Android, Debian and SuSE

1990-01 - heute

Rolle: Software engineer

Kunde: auf Anfrage

Aufgaben:

• Development of Forth systems, Forth GUIs

2010-02 - 2011-09

Rolle: Senior Design Engineer

Kunde: Dialog

Aufgaben:

• Gasgauge: Firmware development: rewrote smart battery firmware algorithm to b16
• Adapted algorithm for battery aging
• Concept for fast battery characterization
• Software: Debugger GUI and demonstration/data logging GUI, characterization data evaluation, validation tools
• Digital design: integration into test chip

2008-07 - 2010-02

Rolle: IC Design Engineer

Kunde: Diodes

Aufgaben:

• Gasgauge: Digital design: Integration of b16 CPU, I²C interface, RAM, ROM, SPI for debugging, work on 10 bit ADC, debugger interface for software development and demonstration GUI (1 year)
• Charger: Intersil 9221/Maxim 8601 clone, analog design: Comparator blocks, power transistors (including layout and device engineering), architecture, and voltage mode regulator (1 year)
• Administration of the Munich Linux network

2005-04 - 2008-07

Rolle: IC Design Engineer

Kunde: Mikron AG

Aufgaben:

• Direct digital feedback amplifier: Project leader of the modulator part 
• Digital design of I²S input, equalizer DSP, upsampling DSP, volume control; conversion from FPGA tool-based output stage
• Implementation of a GUI to operate the device and design filters (3 years)
• Administration of the Munich Linux network

1998-10 - 2005-04

Rolle: IC Design Engineer

Kunde: Mikron AG

Aufgaben:

• Smart Battery Fuel Gauge, third generation: Developed software simulator to develop and debug firmware, participated in firmware development, debugging and prototype evaluation (1 year)
• Smart Battery Charger: Software simulator and firmware development, participated in SMBus interface development (half a year), redesign of digital part (new timer and watchdog, debugged SMBus) for second release (1/2 year)
• Smart Battery Fuel Gauge, fourth generation: Software simulator, technical project leader, Integration and debugging of digital part, evaluation and test development (1.5 years)
• Acoustic Touch Screen Controller (IntelliTouch): Project leader, digital design (integration of Inventra USB and 8051, flash and SRAM), specification, analog supervision (analog part comprises two PLLs, amplification, bandpass filter, pipelined ADC) (2 years)
• Laser barcode reader: Project leader, digital design (integration of b16, RAM, ROM, and SPI interface) (2 years, continued at Zetex)
• From 2005 also administration of the Unix/Linux network

1997-07 - 1998-10

Rolle: ASIC Designer

Kunde: Mixed Mode

Aufgaben:

• consulting customers in ASIC projects. Wrote a C++ Model for a CAN peripheral for Siemens HL
• Wrote tests for the VHDL model of the CAN peripheral
• Designed a generic peripheral class, support for event driven C++ hardware simulation library