Work and Leadership Experience2021 - todayRole: Freelance Consultant - Senior Project Manager Semiconductors
Different customers (Infineon, AMS-OSRAM)
- ISO 26262 (ASIL-D), ISO 21434, ISO 7816, ISO 14443 microcontrollers project management
- Defined and negotiated project scope, work packages and budget
- Planned, negotiated and monitored resources
- Performed risk assessment and developed mitigation countermeasures
- Managed configuration, delivery schedule and milestone release
- Supervised multidisciplinary product development teams
- Leaded virtual multicultural development teams
- Scheduled and implemented project risks and performance audits
- Reported project status
- Developed project and processes documentation
2015 - 2020Role: Project Manager Product Certifications
Customer: Infineon Technologies AG, Munich, Germany
- Managed 30+ high-security products' certification (Common Criteria EAL6+, EMVCo, CUP)
- Coordinated multidisciplinary development teams
- Scoped and scheduled deliveries
- Developed certification documentation
- Planned and moderated IP design reviews and audits (TÜV, Brightsight, CFNRA)
2006 - 2015Role: Senior Staff Digital Designer
Customer: Infineon Technologies Austria AG, Graz, Austria
- Architected high-security ChipCard SLE78 and SLE90 microcontrollers family
- Digital design of multi-clock interface management and digital power control subsystems
- Delivery planning, chip top-level integration, configuration management
- Design sign-off coordination
- Product security certifications support
2003 - 2006Role: Digital Design Team Lead
Customer: SMC Videoscan, Moscow, Russia
- Architecture and concept development of ultra-fast video capturing systems
- FPGA design team leadership
- System architecture design
- EDA tools park supervision and development
2000 - 2003Role: Digital ASIC Designer
Customer: Nortel Networks, Ottawa, Canada
- Deployed bus functional models for OIF SPI-4.2, Utopia Level 3, CSIX interfaces for Q192 ASIC
- Maintained functional regression at module and system levels
- Architected Synopsys VERA-HVL verification environment and behavioral models
- RTL design of sub-hierarchy and proprietary high-speed ASIC bus interface
- Authored technical documentation of Q192 and OC48 ASIC projects
1997 - 2000Role: Associate Professor, Computer science department
Customer: Vladimir State Technical University (Russia)
- Development and delivery of course lectures and labs on digital design, ASIC testing
- Supervised R&D projects and co-operation activities under EUROCHIP/EUROPRACTICE framework
- Communication with industrial customers
- Planning and execution of training courses in ASIC testing and Xilinx FPGA design